G3, G4, 603, 604
Scott L. Barber - Sept. 1999
Scott L. Barber first posted this to Quadlist. It is reprinted with his permission.
I disagree about the G4 vs. G3 being "marginally better." Given the 603 v. the 604, where the 603 cannot handle multitasking properly and has a bus utilization rate that is so high that it cannot be configured for multiprocessing, nor can it handle intensive floating point calculations. The 604 handles all of these without a problem. The G3, based off of the 603, has similar - and much more magnified -- problems. The bus utilization issue is more prevalent, and while processes are run faster, the same limitation on concurrent processes still exists, meaning code cannot be queued as well. This can be seen in the MacBench tests and the real world tests, where a generational advance should be more than twice as much as the previous processor.
That said, the G3 outperforms the 603 by nearly five times, but it requires a considerable amount of backside cache to do so. Coupled with this backside cache, the G3 only performs twice as fast as the 604, and only in certain tasks. Just as the 604 ran nearly five times faster than the 603 in floating point functions, the G3 is nearly as powerful as the 604.
IBM has, on several occasions, made references to the problems with the G3, and has already released information about the G4 chip, which is a considerable jump far and above the 604e, and the G3 itself. 603 and 604 represent two specific architectures within the RISC design, something that can have an analogy drawn to it like this. . . .
The 603 is to the 604 (remember your SATs?) as the 68LC040 is to the 68040. Just an order of magnitude higher. G3 to G4 will be the same thing.
OK . . . now that I've completely badmouthed the 603, I want to remind you that Apple made the matter even worse by putting the 603 in the worst light it could (guess which models I'm referring to). After clone manufacturers started throwing 603e processors into their machines and building motherboards properly around the 603, the 603 chip started gaining respect. Here's where I start complimenting the 603 - ready?
The 603 is perfectly designed for the home user. A fast processor, it implements considerable integer processing capabilities needed to outperform the 601 with the Mac OS. While the 601 was a good solid bit of horsepower, it resembled a small diesel engine - slow to respond, designed to haul only specific loads, and a bit bulky. The 603 is a more streamlined processor, able to handle normal OS functions with a considerable amount of ease. The 603 is perfect for the home user, being that the home user browses the internet, prints with either Postscript or QuickDraw, and likes to play games in 256 colors. Every so often, the 603 is required to handle a floating point task, and that's fine.
It's hard to say where the 603 cuts off and the 604 becomes necessary, but if you're running a software package that costs $500, then you probably need a 604. Photoshop, Illustrator, Quark, Vellum, Infini-D, etc.: these are programs that take advantage of the 604.
I've had the opportunity to work on a 603 and 604 of the same speed and on the same bus. . . here's the example of Photoshop and Netscape. When a filter is running on Photoshop - arbitrary rotation of a 109 MB color RGB photo scan, I cannot browse the internet with Netscape while Photoshop does the work in the background. With a 604, I can, and there is very little interference.
Similarly, the RC5 DES challenge is running on my PowerCenter 150 all the time, and the number of keys calculated rarely changes, even when I'm running several programs. I have never seen a delay in processing, since the OS handles multitasking and priority properly. In effect, the RC5 challenge seems completely transparent on my machine, while on another 603/180 you can definitely tell that the RC5 program is running. It's just a difference in how many simultaneous things the processor is designed to handle.
As always, you're more eloquent than I am, and get the point across much better. Thanx for your help, Dan. . . I only have a couple of comments.
- In short, MHz for MHz, expect the G4 to offer approximately 50% more overall performance and significantly more FPU performance than the G3 offers.
The G4, not exactly making astounding strides in integer math, should pop out about twice as fast as a comparable G3. I'm not disagreeing with your 50%, just that an order of magnitude puts the G4 range at 85-110% percent faster than the G3 . . . according to some of the statements from IBM.
Next, and this is the important one, the significant improvement of FPU functions over the G3 should be underlined. The cross comparison between x4 and x3 chips is accurate, but too many people get stuck in comparing the 604 to the G3. The 604 runs 4 to 5 times better than the 603 in FPU . . . order of magnitude on the 604 puts the G4 FPU routines at 9 to 11 times faster, which is also consistent with statements from IBM. I don't know how to say it more strongly that "significant" either, but it's something that should be emphasized. . . .
- Although nobody seems to have done this, perhaps for the bus utilization problems Scott mentions, or perhaps because of the problems of cache coherence in a multiple processor setting, the G3 can function in a dual processor system.
I just wanted to answer this, even though we're way off topic. The G3 design allowed for dual processing, but the gains are so dependent on linear programming that multiple threads really kill the dual processor. Since bus utilization is very high - 30%, and the estimated amount of overhead necessary to manage the two processors is 10%, the estimated speed of a dual processor system is the following:
- 200% (two processors in perfect alignment)
- -60% (Bus utilization on two processors)
- -10% (Overhead for processor management)
- 130% processor equivalence.
This just isn't reasonable or profitable to do. 604 bus utilization is closer to 10%, and G4 is expected to lower this further (I recall that the target multiprocessor spec for the G4 mentioned something about 16 processors, instead of 4 - like the 604 - making this processor perfect for multiprocessor use.)
- The G4 will apparently be optimized to handle the problems inherent in cache coherence (each CPU must see the same data). There are rumors of an integrated multi-G4-and-cache module specifically designed to optimal performance.
Not rumor . . . that's part of the IBM press releases. Not that IBM wouldn't misconstrue, but not exactly rumor. . .
- If that happens, Intel won't know what hit 'em and the bunnies will be doubly toasted.
Agreed . . . that's what I'm waiting for - and why I won't buy G3s. The problem is this - 604 machines that are daughtercard upgradable will be able to do the G4 upgrade; G3s will not be able to. There's a hint in here as well -- the 7500/100 was able to upgrade to a 604 - the 603 chip excised the multiple process handling of the 601 - the 604 is equivalent to the 601 in this respect, and hence the 601 machines could be upgraded to 604's or G3s. I suppose that the PCI 603 machines could have been upgraded to G3s as well . . . but once you go down the 603 path, you can't switch sides.
I'm going to say this wrong, because I don't know quite how to say it right . . . The 603 can only handle 4 simultaneous processes, because of the queue. The 604 can handle 64. The 601 could handle 32. Because of the addressing inside the 601, the 604 took the 32 available and prioritized them to get 64 total (32 active and 32 passive, instead of just 32 active). The G3 still has 4 - which is why the bus utilization is so high (2 processes must be dedicated for talking to the other chips at all times on each cycle, which is half of the 603 or G3). The G4 may still be 64 . . . it may be higher - can't remember. This is why the 604 and 601 machines can support the G3 - the G3 actually requires less from the rest of the motherboard hardware than the native processors require. Either way, though I know I'm really technically blowing this, that is a core reason why the 603 is so bad in my book. . . .
Someone with a bit more education on the two RISC subsets (603 and 604) will be able to completely tear apart the above paragraph, and prove me the charlatan that I am *sigh*. I wish I could pull all this together in a coherent post, with all the press releases and all the specs and quotes, but it's just been spread over a year and a half of listening to releases and looking at spec sheets and predictions from the IBM/Sommerset labs.
- Scott L. Barber <firstname.lastname@example.org>
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